1. Technical Field
The present invention relates to an electronic component formed by using a pattern formation method wherein the second resist pattern is formed on the first resist pattern by a transfer-printing and in particular, relates to a display device having a thin film transistor (TFT) formed by using the above-mentioned pattern formation method.
2. Background Art
A method of manufacturing such an electronic component as semiconductor device, in particular a method of manufacturing the TFT has been supported by such technological development as a film-forming technology, a photolithography technique and an etching technology. In the TFT manufacturing process, its permanent problem is a development of means for improving its productivity, performance and yield.
Means for solving the above-mentioned problem is to combine a resist mask formation and an etching efficiently.
A concept of the above mentioned efficient combination is that forming the resist pattern on the film needed for composing TFT, etching the film by using this resist pattern as a first mask, and further etching the film after transforming the resist pattern in some way to be used as a second mask.
Thus, by etching the film for the TFT before and after the step of transforming the resist pattern, respectively, different patterns are formed on the film. By designing such processes, the number of photolithography steps such as the resist coating, the exposure and the development can be reduced.
In recent years, in order to reduce the number of the photolithography steps, it is also considered that the resist pattern is formed directly on a substrate by using a transfer-printing method. According to this transfer-printing method, because the resist pattern can be formed by only printing technology, those needed steps such as resist coating step, exposure step and development step can be omitted. Therefore, the productivity can be improved.
First, well-known examples using photolithography technique will be described in the range of inventor's knowledge. In order to understand the examples easily, they are classified into three technological groups as follows.
A first related art technology is to transform a resist by dissolving it. This technology is called a reflow technology. There are two methods belonging to this reflow technology. The one is resorting to heat, and the other is resorting to chemical solution or its vapor.
A second related art is a technology in which a resist is subjected to volume expansion, that is, the resist is transformed by swelling it. In fact, such swelling technology is called a silylization.
A third related art is a technology in which a part of resist is removed, and then a remaining resist is transformed. This method uses a controlled exposure mask having three or more stages of light transmission factors. By exposing a resist to light through this mask, at least three different film thicknesses are simultaneously provided into the resist such that a thick portion, a thin portion and non-resist portion are formed on a substrate, and then the thin portion is appropriately removed in the succeeding step. As to the removing method, either a solvent method using a development process or a dry method using an ashing process is available.
A related art will be described in detail according to the above-mentioned technological classification by referring processes of forming such as a drain electrode, a source electrode, a data pad (terminal electrode), a wiring pattern, and a channel.
Here, the above-mentioned first related art is described by dividing it into a first conventional example and a second conventional example.
The first conventional example ([patent document 1: Japanese Patent Application Laid-Open No. 2000-131719]) belongs to a technology which dissolute and transform the resist pattern relying on heat treatment.
FIG. 11A to FIG. 11C are cross sectional views each showing a manufacturing step of an inverted-stagger type TFT for the above described first conventional example. In the following, the description is made in order of steps.
First, by patterning a metal film formed on the insulating glass substrate 101, a gate pattern that includes a gate line 102, a gate electrode 103 and a gate pad 104 is formed. The metal film may be either a single layer or a laminated state if needed.
Next, a gate insulation film 105, a semiconductor layer 106 such as an amorphous silicon film, a contact layer 107 such as an n-type amorphous silicon film, and a metal film are laminated to cover the gate pattern in that order. In a patterning step, the metal film will be patterned so as to form a data line 108, a drain electrode 109, a source electrode 110 and a data pad 111 as follows.
As shown in FIG. 11A, after arranging a pre-transform resist pattern 112 on a required area of the metal layer, the metal layer is etched to form the data pattern that includes the data line 108, the drain electrode 109, the source electrode 110 and the data pad 111.
After that, as shown in FIG. 11B, by reflowing the pre-transform resist pattern 112 with heat treatment, a post-transform resist pattern 113 is obtained. And the contact layer 107 and the semiconductor layer 106 are etched and selectively removed from the substrate by using the post-transform resist pattern 113 as a mask.
As shown in FIG. 11C, after removing the post-transform resist pattern 113 from the substrate, a channel region of the TFT is formed by removing the part of the contact layer 107 and the semiconductor layer 106 by using the data pattern as a mask.
Hereinafter, an insulating film which is not being illustrated is laminated on the substrate shown in FIG. 11C. And contact holes (not shown) are provided on corresponding portions of a gate pad 104, a data pad 111 and a drain electrode 109 to be connected to an upper layer film formed on those portions.
After that, transparent electrodes of indium tin oxide (ITO) or the like are formed on the substrate to form pixel electrodes electrically connected with drain electrodes and protection layers for protecting a gate pad and a data pad, and then a TFT substrate is brought to completion.
The second conventional example ([patent document 2: Japanese Patent Publication No. 3616584]) is a technology which transforms a resist film by a reflow as well as the first conventional example. However, in the second conventional example, the resist is transformed by either dipping it into a chemical solution having the functions to dissolve or revealing it to the chemical solution vapor, and thus it is different from the first conventional example resorting to the heat treatment
A detailed manufacturing method of the second conventional example will be described referring to FIG. 11 which is used in the first conventional example so that a point of difference with the first conventional example may become clear. By using a pre-transform resist pattern 112 as a mask, a metal layer turned to be the data pattern is etched together with a contact layer 107. After that, the pre-transform resist pattern 112 is reflowed by either dipping it to a chemical solution having the functions to dissolve the resist or revealing it to the chemical solution vapor to form a post-transform resist pattern 113. And a semiconductor layer 106 is removed by using the post-transform resist pattern 113 as a mask.
In this conventional example, other technology is also disclosed such that a deterioration layer formed on the resist surface is removed prior to reflowing the resist. Removal processing methods for the deterioration layer are either plasma processing or ultra violet (UV) ozone processing. As to the plasma processing, it is processed based on oxygen (O2) gas system or the fluoric gas system, and various gas and its assortment are disclosed.
There is another conventional example ([patent document 3: Japanese Patent Publication No. 3415602]) which relates about the end-point control of the reflow as an application of the second conventional example. This conventional example discloses a method to hold a reflowed resist at the barrier portion to which the resist encounters first. This barrier portion is structural unevenness, and its detailed structure is also disclosed.
Next, such transforming technology for the resist classified into the second related art will be described as a third conventional example ([patent document 4: Japanese Patent Publication No. 3236266]) where the resist is subjected to a volume expansion, that is, the resist is swollen by the solution.
The third conventional example will be described below with referring to FIG. 12A, FIG. 12B and FIG. 12C. An amorphous silicon film 202 and an n-type amorphous silicon film 203 are laminated on the insulating substrate 201, and a pre-swollen pattern 204 is further formed. The pattern of the n-type amorphous silicon film 203 is formed by using the pre-swollen pattern 204 as a mask (FIG. 12A).
Next, by dipping the pre-swollen pattern 204 into an organic silane solution, or by revealing the pre-swollen pattern 204 to the organic silane vapor, the pre-swollen pattern 204 is silylized and expanded in its volume to cause a transformation thereof. By this operation, an isolated pre-swollen resist 204 is united each other, and thus a post-swollen resist pattern 205 is formed (FIG. 12B).
By etching an amorphous silicon film 202 using the post-swollen resist pattern 205 as a mask, an island 206 is formed (FIG. 12C).
Next, other technologies of partially removing a resist and transform it, which is classified into the third related art will be described as the fourth conventional example and the fifth conventional example, respectively.
The fourth conventional example ([patent document 5: Japanese Patent Publication No. 3756363]) uses an exposure mask which is available for the light transmittance in three stages. By exposing a resist to light through the exposure mask, at least three different film thicknesses are simultaneously provided into the resist such that a thick portion, a thin portion and non-resist portion are formed on a substrate. A lower layer film is etched by using the resist pattern as a mask, and after that, the resist pattern is transformed by removing a thin portion of it, and then the lower layer film is further etched by using the post-transform resist pattern as a mask.
Exposure processing will be described referring to FIG. 13. A resist film 302 is coated on the substrate 301 provided with a film, and the resist film is exposed to light 304 of wavelength sensitive to the resist film by using a slit mask 303 including the slit part 305.
In the slit part 305 of the slit mask 303, a minute pattern is arranged such that the pattern is smaller than the resolution limit determined from the characteristic of the resist, the exposure wavelength and the exposure lens performance or the like. Therefore, the transmitted light volume through the slit part 305 would be the light quantity corresponding to the intermediate light quantity between a shaded part and a non-shaded part. By exposing the resist film with such mask, an exposed part 306 and an unexposed part 307 can be produced in the resist film (FIG. 13A). By developing the above-described exposed resist film, as shown in FIG. 13B, a resist pattern having a thick portion, thin(intermediate) portion and non-resist portion is formed on the substrate at one time.
Although an example of an exposure mask using a slit mask has been described, it is also disclosed about a mask using a latticed mask instead of a slit mask, and a mask with a semitransparent film instead of a minute pattern mask having smaller size than the exposure resolution.
Next, by referring to FIG. 14A, FIG. 14B and FIG. 14C, a method of manufacturing a TFT substrate using this conventional example will be described.
A gate electrode 311 is formed on the insulating substrate 310, and a gate insulation film 312, a semiconductor film 313, a contact film 314 and a metal film 315 are laminated successively on it. After that, the resist is exposed by using an exposure mask which is available for the light transmittance in three stages as described above, a resist pattern having a thick portion, thin portion and non-resist portion is formed on the substrate at one time. And a metal layer 315 is etched by using this resist pattern as a mask (FIG. 14A).
Next, by etching the contact film 314 and semiconductor film 313, the contact layer pattern 317 and the semiconductor pattern 318 are formed (FIG. 14B).
Next, a resist film 316 is transformed by removing the resist film using ashing process by about thickness corresponding to the thin portion thereof or more. In this ashing removal process, either a plasma gas or a microwave is used. A metal film is etched again by using the transformed resist pattern as a mask, and thus a source electrode 319 and a drain electrode 320 are formed. The part of the contact layer pattern 317 and the semiconductor pattern 318 is further etched to form a channel portion of a transistor is formed (FIG. 14C). Hereinafter, an insulating film and pixel electrodes are formed to complete the TFT, wherein the insulating film is aimed at protecting transistors and functioning as an interlayer insulation film separating wiring and the pixel electrodes.
The fifth conventional example ([patent document 6: Japanese Patent Application Laid-Open No. 2005-159294]) is technology which transforms the resist pattern using development. Difference between this case and the fourth conventional example will be described referring to FIG. 14 used by a description of an example of the fourth conventional example. By forming the resist film 316 in a similar manner as in the fourth conventional example, and removing a metal layer 315 with the resist film 316 as a mask (FIG. 14A), and etching the contact film 314 and the semiconductor film 313, the contact layer pattern 317 and the semiconductor pattern 318 are formed (FIG. 14B).
Next, if needed, the removing process is applied to the surface of the resist film 316 to remove a deposit layer or a deterioration layer formed thereon. Either a wet method or a dry method is employed for this process; the wet method uses a chemical solution which dissolves a resist such as a developing solution and a stripping solution, while the dry method includes ultra violet (UV)/ozone (O3) process and an ashing process. And then, a transformed resist is formed by using the development process wherein a thin portion of the resist is removed to reveal the substrate.
Difference between the fourth conventional example and the fifth conventional example is an elimination method for the resist pattern. That is, the former is a method using an ashing method, and the latter is a method using development method.
A metal film is etched again by using the transformed resist pattern as a mask, and thus a source electrode 319 and a drain electrode 320 are separated. The part of the contact layer film 314 and the semiconductor film 313 is etched and a channel portion is formed (FIG. 14C). Hereinafter, an insulating film and pixel electrodes are provided to complete the TFT, wherein the insulating film is aimed at protecting transistors and functioning as an interlayer insulation film separating wiring and the pixel electrodes.
In the above mentioned description, although well-known techniques classified into the first to third related arts are described as the first to fifth conventional examples, a developed technology from the second conventional example will be described below as the sixth conventional example. This conventional example is disclosed in the patent document 2 as well as the second conventional example.
A common technical issue to the first and second conventional examples described in the first related art is that even unnecessary portions of the resist are reflowed.
The unnecessary portions 114 are designated in FIG. 11. The sixth conventional example indicates a technology to reduce these unnecessary portions.
This conventional example will be described referring to FIG. 15A and FIG. 15B. Upper side of FIG. 15A and FIG. 15B are plan views, and FIG. 15A-X and FIG. 15B-X indicated on the underside are cross sectional views along X-X′ lines of FIG. 15A and FIG. 15B, respectively. Difference between the sixth conventional example and the second conventional example is that the resist pattern before the reflow process is formed by using an exposure mask which is available for the light transmittance in three stages as described in the fourth and fifth conventional examples.
According to FIG. 15A and FIG. 15A-X, the resist portion which should be transformed and reflowed adjacent to a channel portion 401 is made thick, and its surrounding area is made thin. That is, by making thin thickness of the resist thickness at the portion adjacent to unwanted reflow area, the reflow area toward that unwanted reflow area is made small (FIG. 15B and FIG. 15B-X indicate the stage after the reflow process).
In the foregoing, well-known examples which efficiently combined a formation and an etching of the resist mask has been described in detail taking the examples of forming a source electrode, a drain electrode and a channel.
Another well-known example which efficiently combined the formation and the etching of the resist mask will be further described. This technology relates to giving a forward tapered shape to a wiring edge.
First, there is a technology in which the forward tapered shapes are provided at wiring edges by reflowing a resist by a solvent. This technology is disclosed in the patent document 2 as well as the second conventional example. This technology will be described by referring to FIG. 16.
A single alloy layer film 502 of aluminum(Al) and copper(Cu) is formed on the insulating substrate 501, and a resist is applied on it. Next, the resist pattern 503 is formed using photolithography (FIG. 16A).
Next, a part of the single alloy layer film 502 is etched by using the resist pattern 503 as a mask. After that, the resist pattern is expanded to form a post-reflow resist pattern 504 (FIG. 16B) by reflowing the resist pattern by an organic solvent.
Next, the single alloy layer film 502 is etched by using the post-reflow resist pattern 504 as a mask (FIG. 16C).
By the foregoing processing, a wiring edge can be made the forward tapered shape like the staircase. In this patent document 2, it is further disclosed the case that two or more kinds of metal films are laminated for the wiring.
Next, a technology for providing the forward tapered shapes to wiring edges will be described, in which a resist are subjected to the volume expansion. This technology is disclosed in the above-stated patent document 4 as well as the third conventional example, and it will be described referring to FIG. 17.
A single Al—Cu alloy layer film 602 is formed on the insulating substrate 601, and a resist is applied on it. Next, the resist pattern 603 is formed using photolithography (FIG. 17A).
Next, after etching the part of the single alloy layer film 602 by using the resist pattern 603 as a mask, the resist pattern 603 is revealed to an organic silane gas to swell it, and thus a post-swollen resist pattern 604 is formed (FIG. 17B).
Next, the single alloy layer film 602 is etched by using the post-swollen resist pattern 604 as a mask (FIG. 17C).
By using the above mentioned processing, a wiring edge can be made to have a forward tapered shape like a staircase.
In the foregoing, known examples for manufacturing the TFT by efficiently combining a formation and an etching for a resist mask has been described. In the foregoing description, two processes are separately described such that one is the process of forming a source electrode, a drain electrode and a channel, and the other is a process for providing the forward tapered shapes to a wiring edge.
In the following description, a well-known example relating to a pattern transfer-printing will be mainly described.
As to a method to arrange the resist pattern on a substrate by a transfer-printing, there is a relief reversal offset printing.
As the seventh conventional example ([patent document 7: Japanese Patent Publication No. 3730002]), a pattern forming method by the relief reversal offset printing will be described. According to this conventional example, although it mainly relates to production of a color filter, the limitation of its use is not mentioned.
FIG. 18 shows the seventh conventional example and FIG. 18A indicates a movement of the whole apparatus, FIG. 18B indicates a step image pull-out and FIG. 18C indicates a transfer step, respectively.
1) A blanket cylinder 701 wound with a silicon sheet (not shown) is installed in the movable frame 705. The movable frame 705 moves along a fixed frame 704 equipped with a glass substrate stage 702 and a printing stamp stage 703. A glass substrate 706 is located on the glass substrate stage 702 and stamp 707 is located on the printing stamp stage 703 (FIG. 18A).
2) A predetermined amount of the ink is dropped on the silicon sheet wound around the blanket cylinder 701 using a dispenser 708.
3) The blade 709 and the ink are contacted by rotating the blanket cylinder 701 so that the ink is made uniform thickness at the surface of the silicon sheet.
4) The stamp 707 is pressed to an ink film 710 on the silicon sheet (blanket), and an ink 711 in a portion corresponding to a stamp portion is removed from the blanket (FIG. 18B).
5) An ink film 712 with the desired shape that remained in the blanket is transfer-printed on the glass substrate 706 (FIG. 18C). In this way, an ink with the desired shape is transfer-printed on the glass substrate.
According to this conventional example, the silicon is disclosed as the material of the sheet (blanket) wound around the blanket cylinder.
In a following eighth conventional example ([patent document 8: Japanese Patent Application Laid-Open No. 2006-124546]), such technology will be described that a transfer-printing technology with precise pattern accuracy and resist material (ink) available for the relief reversal offset printing indicated by the seventh conventional example.
Resist in the eighth conventional example includes resin soluble to an organic solvent (A), and an organic solvent (B).
As to the resin, an alkali-soluble resin such as novolac resin, acrylic resin and those mixtures are disclosed.
As an example of the organic solvent, isopropyl alcohol, propyl alcohol and ethyl alcohol are disclosed with no smaller than 60% of gross weight % (hereinafter, “wt %”). It is further disclosed that it is able to mix with propylene glycol monomethyl ether acetate.
In order to perform the transfer-printing certainly, it is desirable that a transfer pattern should include a large number of lines along vertical or slanting directions but a small number of lines along the horizontal direction. This is because a transfer-printing tends to be inferior to a line of a horizontal direction. For example, in a case of a grid pattern, its pattern is transfer-printed such that the grid is rotated to have a shape of rhombus.
It is disclosed to heat and dry the resist under 100-150° C. for 1-15 minutes after the transfer-printing. As resist material, it is disclosed to be able to adopt a photo-curing mold material and/or a thermal hardening mold material.
According to this conventional example, by using a relief reversal offset printing with the above-mentioned resist, it is disclosed to form the gate pattern width of 50 μm for TFT on the substrate. On the substrate, an upper layer film of Mo (molybdenum) and a lower layer film of Al—Nd (neodymium) alloy are formed in advance.
Next, as the ninth conventional example ([patent document 9: a Published Japanese translation of PCT application No. 2006-512757 bulletins]), a pattern forming technology will be described wherein a resist pattern having three region of a thick portion, thin portion and non-resist portion is formed on the substrate by forming the second resist pattern on the first resist pattern, like in the case of the second related art.
A method to form a source electrode, a drain electrode and a channel will be described referring to FIG. 19.
First, a gate insulation film 802, semiconductor film 803, a contact layer 804 and an upper layer metal film 805 are formed successively on the insulating substrate 801 provided with a gate pattern. After that, the first resist pattern 806 is arranged on the insulating substrate (FIG. 19A).
Next, the second resist pattern 807 is arranged so that at least part of the first resist pattern 806 and a channel portion is covered with it. By using the first resist pattern 806 and the second resist pattern 807 as a mask, an upper layer metal film 805, a contact film 804 and semiconductor film 803 are removed by the first etching step to expose a gate insulation film 802 (FIG. 19B). At that time, the upper layer metal film/the contact film/the semiconductor film remains in the channel portion. That is, although the island peripheral pattern is formed, a source electrode and a drain electrode are not separated.
Next, the second resist 807 of the channel portion is removed (FIG. 19C).
Next, by the second etching step, the part of the upper layer metal film 805, the contact film 804 and the semiconductor film 803 of the channel portion is removed, and the channel portion is formed (FIG. 19D).
In this way, the ninth conventional example is a method to form a channel (by removing the part of the semiconductor film from an upper layer film) after removing the resist arranged on the channel portion.
However, a related art described by a background art has several issues and problems. Conventional problems will be described below by illustrating the example of a liquid crystal display (LCD) device.
First, the first related art that it makes reflow a resist, that is, a problem of the first conventional example and the second conventional example will be described.
The first problem is as follows:
A resist before transformation is arranged on the substrate with the shape similar to the data pattern, that is, almost the same shape of a source electrode, a drain electrode and data wiring. A film of a lower layer is etched by using the resist pattern before the transformation as a mask, and the data pattern is formed.
Next, the resist pattern before the transformation is transformed by the reflowing process.
The purpose of the reflowing of the resist pattern is to cover a channel portion with the resist. To this end, the needed reflow length is at least ½ of a channel width.
A channel width of usual amorphous silicon TFT is about approximately 6 μm in spite of the fineness of the LCD panel. Accordingly, the needed reflow distance will be at least 3 μm.
The resist pattern before a reflow covers the entire data pattern. Therefore, by the above-mentioned reflow processing, a resist will reflow and spread not only in a channel portion but also on all area of the source electrode, a drain electrode and data wiring. Needless to say, its needed distance is also at least 3 μm.
When the semiconductor film is etched by using the resist pattern as a mask after such reflow, pattern formation will be performed in such a manner that semiconductor film is rimming around the source electrode, the drain electrode and the data wiring. (It has been expressed by a description of a background art with “unnecessary portion” and it has been described.) Thus, semiconductor film rimming the data pattern affects unwanted influence and as a result, causes a decline of the display quality of the LCD device.
One of the reasons is that it relates to semiconductor film for which it is left so that a data wiring may be rimmed. It is effective in the meaning that the wiring is tapered due to semiconductor film left around the data wiring. However, the problem is that its width is wider than about ½ of the channel width.
For example, it is verified by using a VGA panel classified into the rough fineness class in the general LCD panel. That is, the size of one pixel surrounded with gate wiring and data wiring is about 100 μm along the gate wiring and about 300 μm along the data wiring. The width of the gate wiring is about 25 μm and the width of the data wiring is about 8 μm. The distance between the data wiring and the pixel electrode needs about more than 5 μm when taking the yield or the like into consideration.
From the foregoing, the width of the pixel electrode which can be formed between adjacent data wirings is about approximately 82 μm in case of not using the reflow process. On the other hand, with reflowing, the width of the pixel electrode will be 76 μm. Therefore, with reflowing, only an aperture ratio of 76/82=92.7% can be obtained compared with a case without reflow. The difference in the aperture ratios influences panel brightness directly.
Although more LCD panels become high-definition in these days, the higher the fineness is, the more remarkable the above-mentioned problem becomes, and decreasing rate of LCD panel brightness will be increased in more. This is because a channel width is fixed mostly in spite of the higher fineness.
The second reason relates to the semiconductor film rimming a source electrode and a drain electrode surrounding the channel portion.
In an ordinary LCD panel, it has the structure designed so that ambient light is not applied to the semiconductor film formed in an integrated manner with a channel portion.
Specifically, by installing a light shielding layer on the color filter substrate opposing to TFT, it is preventing ambient light being applied to the semiconductor film. Such remedy is employed in order to suppress that the off characteristic of TFT is aggravated due to leak current generated in the channel portion when the semiconductor film is exposed to the light.
When the reflowing is performed, the semiconductor film is left so as to rim the source electrode and the drain electrode by surrounding the channel portion. Therefore, when the rimmed portion of remained semiconductor film is exposed to the light, leak current flows inevitably and it deteriorates the off characteristic of the TFT.
In order to suppress deterioration of the transistor characteristic, the area of the light shielding layer arranged on the color filter should be made wide. However, such structure encounters the problem of decreasing an aperture ratio as explained in the above mentioned first reason.
According to a method described by the sixth conventional example, such rim areas of the semiconductor film surrounding the data line, the source electrode and the drain electrode can be reduced to some extent. However, the resist has to be made reflow after forming the data pattern using the pre-reflow resist pattern. For this reason, the method described in the sixth conventional example would not be a perfect measure theoretically.
The sixth conventional example is technology using an exposure mask which controls the light transmittance in three stages, and there are also a lot of other problems. This point will be described later in a problem description of the third related art.
The second problem is described in the followings:
The second problem relates to a damaged layer formed on the resist surface. The damaged layer is formed on the surface of the pre-reflow resist pattern by various treatments such as a development processing, a heat treatment such as pre-baking and post-baking, an etching treatment such as a dry-etching and a wet-etching, and leaving in the atmosphere. This damaged layer is formed chemically and/or physically.
The damaged layer formed on the surface of the pre-reflow resist pattern is not necessarily formed uniformly. That is, there are different damages for every portion. Nonuniformity of such damaged layer induces nonuniformity for the reflow distance of the resist.
In order to solve this problem, the damaged layer formed on the surface of the pre-reflow resist pattern would be removed prior to forming the data pattern. However, uniformity with high accuracy is requested for this removal processing and this processing itself will cause increase of the number of process.
The third problem is described below:
The third problem relates to the surface energy of the foundation substrate on which the resist pattern reflows. Theoretically, the reflow state of the resist is ruled by the surface condition of the foundation substrate, that is, the surface energy.
A case of reflowing the resist by 3 μm on the data line will be described as an example. Assuming that one point with an edge part of the data line is temporarily designated as “A”, a spot where it is 1 μm away from the point “A” in a vertical direction is set to a1, and spots from which it is 2 μm away from the point “A” is set to a2, and a spot from which it is 3 μm away from the point “A” is set to a3. Further, another point with an edge part of the same data line away from the point “A” is temporarily designated as “B”. A spot where it is 1 μm away from the point “B” in a vertical direction is set to b1, and spots from which it is 2 μm away from the point “B” is set to b2, and a spot from which it is 3 μm away from the point “B” is set to b3.
In order to reflow the resist in a direction perpendicular to the extension direction of the data line, those spots a1, a2 and a3 are not necessarily requested to be the same surface energy. The same applies to those spots of b1, b2 and b3 as well. It is also similar about those spots of a1, b1, a2, b2, a3 and b3.
Here, there is a purpose to transform the resist so that an edge of a post-transform resist pattern after reflow may become parallel to a pre-transform resist pattern, that is, parallel to the data wiring. For that purpose, the degree of the surface energy affecting on the reflow distance up to the point “A” through spot a3 and the point “B” through the spot b3 has to be the same.
However, the surface energy is different on every portion of the substrate provided with the pre-reflow resist pattern. That is, it is because the history of various treatments are remained on the substrate, e.g., the development processing, the heat treatment such as pre-baking and post-baking, the etching treatment such as dry-etching and wet-etching, and the leaving in the atmosphere.
When the pre-transform resist pattern is reflowed under such condition, the post-transform resist pattern becomes wavy pattern.
Thus, in the case of such wavy pattern, the interval between the data wiring and the pixel electrode has to be set widely compared with a case without using the reflow in view of considering the safety thereof. As a result, a decline of an aperture ratio is inevitable.
In such a situation, moreover, in order to cover a channel portion stably by reflowing the resist, the above mentioned interval has to set no smaller than 3 μm with consideration of its safety rate. Therefore, the width of remained rim portions of the semiconductor film surrounding the data wiring, source electrode and drain electrode becomes wider. Accordingly, such a vicious circle is caused as a further decline of the aperture ratio and deterioration of the transistor's off-characteristic.
The fourth problem is described below:
The fourth problem relates to controlling of the resist-reflow end point. When the heat treatment is used, it is necessary to give fluidity to a resist by heating it more than the softening point thereof. On the other hand, in case of using solution and vapor, it is necessary to dissolve the resist and give fluidity to it.
The reflow of the resist depends on such factors as the volume of the resist, the surface energy of the above-mentioned substrate and fluidity of the resist.
Therefore, in order to control the reflow end of the resist by the intended shape with high accuracy, a terminal control technology for stopping the reflow is needed.
Accordingly, such an idea is needed to provide a sort of steps on the substrate to stop the flow of the resist prior to the reflow processing as explained in the background art. Providing such steps on the foundation substrate to hold the reflowed resist, it inevitably increases the number of manufacturing steps. The degree of freedom for the design of a pattern arrangement is deprived.
The fifth problem is described below:
The fifth problem relates to the resist thickness formed on the substrate. The resist thickness for producing a TFT substrate is usually about 1.0-1.5 μm in a usual case which does not resort the reflow process. On the other hand, when reflowing, the resist thickness beyond the usual film thickness is requested.
For this reason, in an exposure step, of course, the luminous exposure has to be made large. Therefore, a decline of the productivity is caused. Moreover, a thick resist film also causes the deterioration of the pattern dimension accuracy simultaneously.
Next, a problem of technology, that is, which swells, and transforms a resist about performing volume expansion of a resist described by the second related art, that is, the third conventional example will be described.
The first problem in the second related art is the same problem as the first problem in the first related art. A pre-swelled resist swells isotropically during swelling processing. Therefore, when a base film is etched by using a post-swelling resist as a mask after swelling, it is left by the shape that the semiconductor film rims around the source electrode, the drain electrode and the data wiring, and the rim-like pattern is formed. This causes a brightness declining in an LCD panel and a deterioration of the transistor's off characteristic.
The second problem in the second related art is the same problem as the second problem of the first related art. When a damaged layer exists on the resist surface before the swelling process, the swelling itself will be obstructed. By removal processing of a damaged layer, an increase in the number of manufacturing process is inevitable.
Next, a technological problem about removing and transforming the part of the resist described in the third related art, that is, the fourth conventional example and the fifth conventional example will be described.
The first problem in the third related art is the same problem as the first problem of the first related art. Even here, there is a problem of a brightness declining and transistor's off-characteristic deterioration in an LCD panel, because the semiconductor film rims around the source electrode, the drain electrode and the data wiring, and it remains to form rimmed pattern.
The first problem in the third related art will be described in detail below.
In manufacturing process of TFT, a method of the third related art is generally used, because it is beneficial to treat a metal film of the data pattern wet etching in view of reduction of the production cost.
In this related art, the data pattern such as the drain electrode, the source electrode and the data wiring is formed by the first etching step of the metal film. Next, a thin resist film arranged on a channel portion is removed by an ashing and development as already explained in the background art.
In general, a resist before reduction (before transformation) arranged on a substrate has a forward tapered shape. Therefore, not only the channel portion but also a metal film such as the drain electrode, the source electrode and data wiring are also exposed so as to be like a rim by using such an isotropy etching as an ashing and development.
In order to expose the channel portion, the resist thickness to be removed is ordinary about 1200-1500 nm. Next, the second isotropic wet etching is performed for the purpose of removing the metal film of the exposed channel portion. At the same time, the exposed portion with the shape of rimming the drain electrode, the source electrode and the data line (frame-like semiconductor film) is also etched, and further, a side etching is also performed.
As a result, semiconductor film is remained around the data pattern such as the source electrode, the drain electrode and the data line so as to rim them with the rim-width of about 1.4-2.0 μm as confirmed by the present inventor.
In the first related art and the second related art, the semiconductor film is extended and remained like rim without changing the original form size of the data pattern. In this related art, in contrast, a metal film is reduced without changing the size of the semiconductor film formed first and thus the semiconductor film remains like rim.
In this way, there are different causes with reverse relation for that the data pattern is rimmed with the semiconductor film, and a TFT is designed such that the line width of the data wiring is made so as not to cause such problem of signal transmission delay. As for a channel, it is designed based on the characteristic of finished product considering the on-off characteristics. Being designed in such ways, problems of the data pattern rimmed with the semiconductor film in the first, second and third related arts are remained as it is.
The second problem in the third related art relates to process for removing the thin resist film arranged on a channel portion such as the ashing (the fourth conventional example) and the development (the fifth conventional example) which are partly explained in the first problem.
A resist before reduction (or pre-reduction resist) is reduced isotropically by the ashing or the development. And an exposed metal film tends to rim the resist pattern after reduction (or post-reduction resist). This exposed width depends on the edge taper angle of the pre-reduction resist. However, in photolithography technique, control of the edge taper angle requires a sophisticated technology compared with such control technology as either area control or thickness control of the resist pattern.
In order to minimize this rimmed width, the edge taper angle of the resist should be set to around 90°, but it requires technical difficulty.
Enlargement of the TFT substrate further complicates the control of taper angle uniformity in the substrate surface.
The third problem in the third related art relates to an exposure mask which specified transmitted light volume of light to three stages.
As to the exposure mask of this type, there are two types, one is using the minute pattern smaller than the exposure resolution and the other is using a semitransparent film. Problems of the both types will be described in order.
First, regarding the mask using the minute pattern smaller than the exposure resolution, there is a difficulty for forming method of either a slit or a grid. A thin resist film located on the channel portion should be formed flatly over the entire channel portion. Actually, however, the resist film becomes cone-shaped or raised shape owing to that the luminous exposure at the area located directly under the slit or grid becomes smaller than that at peripheral area thereof.
The reason of becoming such shapes is based on that there is no designing degree of freedom that arranges the slit and the grid with various shape and size, because the exposure resolution limit of the lithography used for TFT production is about 3.5-4.5 μm, while the channel portion width of ordinary TFT is about 6 μm.
When the resist with the thin channel portion is formed into either the cone shape or the raised shape, in order to secure an intended channel width, the film thickness to be removed by succeeding the ashing or the development have to be set large. Therefore, the semiconductor film which rims the data pattern will be a problem even here.
Next, a mask problem using a semitransparent film is described. The problem here is a method of manufacturing the mask. First, it is a difficult thing to stably form a semitransparent film with the intended transmission factor. Second, because this kind of mask needs two times of pattern drawing process, there are such problems as an alignment matching accuracy between the first and second drawings, and a repair method for a mask defect at the second drawing.
The fourth problem in the third related art relates to an exposure process. In the exposure process using a usual exposure mask, light is applied to a resist, after making it be exposed to light exactly, the light is continuously applied to it to perform excess exposure.
One of the purposes of excess exposure is to act as the margin-like function for eliminating non-exposure portion completely. The other purpose of the excess exposure is to act as a repair-like function preventing such defect that the film thickness of the resist becomes large when dust is mixed in the resist, by even making the resist of such defect to be exposed to light.
However, when an exposure mask with three stages of light transmission amount is used, the excess exposure is not easy to perform. This is because a relatively thin resist film has to be formed on a channel portion with high accuracy. When the excess exposure is performed too much, the resist on the channel portion is also removed.
Therefore, there is a problem of yield declining due to such defects that a resist is not exposed sufficiently and remained as an exposure delinquent, and a short tends to occurs owing to dust.
The fifth problem in the third related art is a problem about development stability of a thin resist arranged on the channel portion which is already exposed to light to some extent. Because the thin resist arranged on the channel portion is the film that is exposed to light to some extent, it inevitably has the property that dissolves in a certain degree of alkali.
Therefore, the thickness of thin resist film provided on the channel portion after the development has larger fluctuation compared with that of thick resist portion (portion which is not exposed to light).
Furthermore, instability of the resist residual film amount on the channel portion also makes the taper angle of the resist unstable.
When the pre-reduction resist is transformed by the ashing or the development, since these processing is the isotropic etching as explained previously, a channel width is affected. As a result, the TFT characteristic is deteriorated, because the instability of a channel width in the LCD panel is caused and thereby causing instability of the transistor characteristic.
The sixth problem in the third related art relates to exposure unevenness. In an exposure machine used for production of TFT, application of light is performed by usually moving the stage or the lens. Because vibration occurs with movement of the stage or the lens, the distance between the resist and the lens is not fixed precisely. Scattering light which reflected from an exposure stage and the exposure lens or the like is also applied to the resist. From these reasons, the photo irradiation amount to the resist is not necessarily uniform over the entire substrate surface.
In the present apparatus level, when exposing using a usual mask, such thing is not regarded as a problem. However, when a resist film with exposed to light to some extent is left on a substrate, the above-mentioned problem cannot be ignored. Such exposure unevenness causes instability of the residual film amount of the resist on the channel portion like the fifth problem in the third related art, and as a result, it deteriorates the TFT characteristic of the LCD panel.
The seventh problem in the third related art relates to the productivity. In this example, the resist has to be provided with a thick portion, a thin portion and a non-resist portion. Therefore, the resist thickness of the thick portion of this example has to be made beyond about 2.0-2.5 μm thick, which is thicker than a case when a usual method is used. Accordingly, a decline of the productivity due to the luminous exposure increase and deterioration of a size accuracy of the resist as described in the fifth problem of the first related art.
Next, a problem associated with an offset printing of the seventh conventional example and the eighth conventional example will be described.
In the seventh conventional example and the eighth conventional example, a method of manufacturing an electronic component by a relief reversal offset printing is disclosed. However, it is not disclosed about technology for overlapping a fine pattern by using a transfer-printing, and there is no disclosure about alignment for it.
Resist material for a transfer-printing only a single resist layer is disclosed as explained in the background art. However, it is not disclosed about the material for arranging and overlapping resist material.
Resin of disclosed resist material is a resin soluble to organic solvent, and the conductive metal material is not disclosed.
Next, a problem in a ninth conventional example will be described.
The ninth conventional example has the above-mentioned first problem, second problem and fifth problem like a problem in the third related art using a gray (semitransparent) tone mask basically, except for a point using an offset printing method instead of photolithography.
The first problem in the ninth conventional example is the same one described as the first problem in the third related art. That is, there is a problem of a brightness declining and a transistor characteristic deterioration in an LCD panel, because the semiconductor film rims around the source electrode, the drain electrode and the data wiring, and it remains to form rimmed pattern.
The second problem in the ninth conventional example is the same one explained as the second problem in the third related art, and it relates a technical subject removing the second resist pattern by the ashing or the dissolution. Control of the edge taper angle requires the sophisticated technology compared with such control technology as either area control or thickness control of the resist pattern.
In particular, in a case when the transfer-printing is used, in order to set the taper angle of the resist after transfer-printing onto a substrate to the extent to the high value close to around 90°, the shape of the resist formed onto a blanket has to possess almost the same shape of it. Although a gravure offset printing is disclosed in this example, it has to possess this shape in the state that the resist pattern is taken up on the blanket.
In order to form the pattern having such shapes, when a resist is taken up on the blanket from a negative printing plate, a resist has to possess thixotropy of the considerable degree. The material having the high thixotropy generally has good adhesion to a negative printing plate, and thus it is difficult to take up the resist on the blanket and take-up defect tends to occur.
The third problem in the ninth conventional example is similar to one described as the fifth problem in the third related art.
This example (the third related art is also the same) removes an upper layer metal film, a contact layer and the part of the semiconductor film on a channel portion, after removing the second resist pattern arranged on the first resist pattern.
The on/off characteristic of the transistor is determined by the width and the length (W/L) of the channel, and in this example, it is determined by the first resist pattern after removing the second resist pattern.
Therefore, when the second resist pattern is removed, unless either selecting the material from which the first resist pattern is not removed, or selecting process condition, it will deviate from the initial set value of W/L. In order to avoid such problem, the amount from which the first resist pattern is removed is taken account of at the time of the second resist pattern removal, and it also can be though that the value of W/L should be determined by the first resist pattern. However, “control of the taper angle of the resist pattern edge” described by the second problem become a problem and is not easy to solve in such situation. Mother Glass and a display screen size used for production of the LCD device are tended to become large size. Accordingly, in order to have an influence on the workmanship of the channel size and uniformity, the above-mentioned problem is closely related to a display unevenness problem of a large size LCD device.
When the second resist pattern is removed, if finding the material and the condition from which the first resist pattern is not removed, after the second resist pattern is arranged at least on the first resist pattern arranged on the substrate, it needs to be a conFIGuration with which they do not mix each other.